eightolives' Schematic Issues

1. Dash length and dash style not implemented
   
   Status: Open

   Issue: Should be implemented for full gEDA compatibility.

   Response:

   
   
2. Filltype and fill width not implemented
   
   Status: Open

   Issue: Should be implemented for full gEDA compatibility.

   Response:Fill type 0 and 1 is supported.

   
   
3. Component select boxes vary
   
   Status: Open

   Issue: The size of some component select boxes vary. Should be more consistent.

   Response:

   
   
4. Edit Pins corrupts Bus stub
   
   Status: Open

   Issue:Edit Pins corrupts Bus stub

   Response:

   
   
5. Kicad netlist not debugged
   
   Status: Open

   Issue: Kicad netlist not debugged.

   Response:

   
   
6. Use of Bus in VHDL
   
   Status: Open

   Issue: VHDL implementation of BUS not complete.

   Response:

   
   
7. Sim Model generation does not support buses
   
   Status: Open

   Issue:Sim model generation does not support buses.

   Response:

   
   
8. Footprints from bxl not complete
   
   Status: Open

   Issue:The footprint files generated from bxl / xml files are not complete or validated. The tool is in debug/development.

   Response:

   
   
9. bxl symbol select boxes too high
   
   Status: Open

   Issue:The symbol select boxes for symbols generated via bxl file is above the symbol.

   Response:

   
   
10. Symbol load
    
    Status: Open

    Issue:Loading a schematic does not wait for a manally selected symbol to load. Must reload the schematic after all manally selected symbols are loaded.

    Response:

    
    
11. Analog Analyze
    
    Status: Open

    Issue:Analog Analyze functions are in development and are not functional or correct.

    Response: